The BS65F2042 is a Flash Memory type 8-bit high performance RISC architecture microcontroller with fully integrated touch key and NFC reader functions. With all touch key functions provided internally, completely eliminating the need for external components, the device has all the feactures to offer designers a reliable and easy means of implementing touch keys within their products applications.

For memory features, the Flash Memory offers users the convenience of multi-programming features. Other memory includes an area of RAM Data Memory as well as an area of true EEPROM memory for storage of non-volatile data such as serial numbers, calibration data etc.

Analog features include a software controlled LCD function. Multiple and extremely flexible Timer Modules provide timing, pulse generation and PWM generation functions. Communication with the outside world is catered for by including fully intergrated UART or I2C interface functions, two popular interfaces which provide designers with a means of easy communication with external peripheral hardware. Protective features such as an internal Watchdog Timer, Low Voltage Reset and Low Voltage Detector coupled with excellent noise immunity and ESD protection ensure that reliable operation is maintained in hostile electrical environments.

A full choice of external low, internal high and low oscillators is provided including two fully integrated system oscillators which require no external components for their implementation. The ability to operate and switch dynamically between a range of operating modes using different clock sources gives users the ability to optimize microcontroller operation and minimize power consumption.

The device includes a 13.56MHz multi-Standard NFC reader. This NFC reader supports ISO/IEC 14443 A, ISO/IEC 14443B and Crypto_M modes. The internal transmitter is able to drive the reader antenna to communicate with ISO/IEC 14443 A, ISO/IEC1444B, Crypto_M cards and transponders without requiring additional active circuitry. The receiver block provides a robust and efficient implementation to demodulate and decode signals from ISO/IEC 14443 A, ISO/IEC1444B, Crypto_M cards and transponders. The digital block manages the complete ISO/IEC 14443 A framing detection and error detection including parity and CRC check.

The inclusion of flexible I/O programming features, Time Base funcitons along with many other features ensure that the device will find excellent use in applications such as smart door locks, hotel door locks, access control applications, smart home appliances, card readers and toys etc.

CPU features

• operating voltage
  • fSYS =8MHz: 1.8V~5.5V
  • fSYS =12MHz: 2.7V~5.5V
  • fSYS =16MHz: 3.3V~5.5V
• up to 0.25μs instruction cycle with 16MHz system clock at VDD =5V
• power down and wake-up functions to reduce power consumption
• oscillator types
  • internal high speed 8/12/16MHz RC – HIRC
  • external low speed 32.768kHz Crystal – LXT
  • internal low speed 32kHz RC – LIRC
• multi-mode operation: FAST, SLOW, IDLE and SLEEP
• fully integrated internal oscillators require no external components
• all instructions executed in 1~3 instruction cycles
• table read instructions
• 115 powerful instructions
• 6-level subroutine nesting
• bit manipulation instruction

Peripheral features

• flash program memory: 4K×16
• RAM data memory: 512×8
• true EEPROM memory: 512×8
• up to 16 touch key functions – fully integrated without requiring external components
• Watchdog Timer function
• up to 26 bidirectional I/O lines
• programmable I/O port source current and sink current for LED driver applications
• single pin-shared external interrupt
• multiple timer modules for time measurement, compare match output or PWM output or single pulse output function
• I2C interface
• fully-duplex / half-duplex universal asynchronous receiver and transmitter interface – UART
• software controlled up to 26-SCOM/SSEG lines LCD driver with 1/3 bias
• dual time base functions for generation of fixed time interrupt signals
• low voltage reset function
• low voltage detect function
• package type: 46-pin QFN

NFC reader features

• highly integrated analog circuits for demodulation and decoding
• operating voltage range: 2.3V~5.5V
• ultra low power consumption, typical communication distance up to 10cm depending on antenna size
• supports ISO/IEC 14443 TypeA/TypeB protocols
• supports ISO 14443 A, B high transfer speed of 106kbit/s, 212kbit/s, 424kbit/s and 848kbit/s
• supported host interfaces
  • I2C interface up to 400kbit/s
  • serial UART up to 1228.8kbit/s
• FIFO buffer for 64-byte transmission and reception
• flexible interrupt modes
• programmable timer
• 3 power saving modes: hardware power-down, software power-down and transmitter power-down
• internal temperature sensor automatically stops RF transmission in high chip temperature situations
• multiple independent power supplies to avoid mutual interference between blocks and improve the operation stability
• CRC coprocessor to implement CRC and parity function
• internal oscillator for connection to a 27.12MHz quartz crystal
• supports low power card detection (LPCD) function